1. Field of the Invention
The present invention generally relates to a signal comparison circuit, and particularly, to a comparison circuit for not-return-to-zero (NRZ) data signal.
2. Description of Related Art
A comparator is often employed by a high speed serial system for detecting amplitude of inputted signals. The comparator compares the data signals with a predetermined threshold or a reference voltage, wherein signals which are too small are identified as of poor quality and are neglected, and only those qualified by the comparator selection can be received.
FIG. 1 describes a typical NRZ data signal 100. The signal 100 has two statuses, logic 1 and logic 0. When the status remains unchanged, the data transmitted thereby is logic 0, which is shown in the direct current (DC) part in FIG. 1. When the status changes, the data transmitted thereby is logic 1, which is shown in the Alternating current (AC) part.
Such a high speed serial system is featured as being capable of changing status with an extreme high frequency. As shown in FIG. 1, when a signal 100 is a direct current signal, it has a frequency of 0 Hz, and when the signal 100 is an alternating current signal, it has a frequency of 2.5 GHz. A conventional comparator if employed thereby cannot immediately enhance the operation frequency from 0 to 2.5 GHz, and is incapable of sustain the high speed operation at 2.5 GHz.
In order to solve the aforementioned problem, some other conventional comparators increase frequency bandwidth by increasing current with a current comparing method. However, this method often causes misjudgement when the data signals are changed between logic 1 and logic 0.
Another proposed solution is employing a peak detector in front of the comparator for detecting and sustaining a maximum value of the data signals. A typical peak detector includes a circuit as shown in FIG. 2, wherein Vin represents an input signal, and Vo represents an output signal. After passing through the peak detector, the data signal declines to a low frequency signal, which can be conveniently processed by the conventional comparators.
Unfortunately, the peak detector requires a current leakage path for discharging charges from a peak detecting capacitor, and only after the charges are discharged, amplitudes of next input data can be compared. When the alternating current data signal changes status, an output voltage of the peak detector will decrease due to the discharging system, thus causing misjudgement.
In summary, conventional comparators have limited operable frequency bandwidth. However, current mode comparators are likely to cause misjudgements when changing status. Further, if employing a peak detector, there raises a problem of voltage droop when comparing alternating current signals. It becomes a major concern to provide an ideal solution.